职责描述: 1.Physical implementation of advanced technology chips. 2.Design methodology development and innovation for advanced technology challenges. 3.Be responsible for 22/16/12/10/7/5nm chip implementation for customer’s projects or internal system test chips. 4.Be responsible for advanced node PPA benchmark, and solution development. 5.EDA tool new features enablement. 6.Customer onsite/offsite supports will be required on demand. 任职要求: 1.MS or above in EE, CS related fields. Experience in APR, physical verification, chip implementation, or CAD development is plus. 2.New graduate or 3 years working experience in chip physical implementation. 3.Familiar with Synopsys/Cadence APR tools/flows. 4.Familiar with TCL/Perl/Python programming. 5.Experience with TSMC advanced technology is plus. 6.Proven record in production tape-outs is plus. 截止日期：2024年08月18日 招聘人数：2人